eic-projdet-pfrich-electronics-l AT lists.bnl.gov
Subject: ePIC pfRICH electronics mailing list
List archive
[Eic-projdet-pfrich-electronics-l] pfRICH HRPPD ASIC / FPGA backplane design meeting on Friday Sep 22nd @ 10:30am EDT
- From: "Kiselev, Alexander" <ayk AT bnl.gov>
- To: "Camarda, Timothy via Eic-projdet-pfrich-electronics-l" <eic-projdet-pfrich-electronics-l AT lists.bnl.gov>
- Subject: [Eic-projdet-pfrich-electronics-l] pfRICH HRPPD ASIC / FPGA backplane design meeting on Friday Sep 22nd @ 10:30am EDT
- Date: Mon, 18 Sep 2023 16:52:38 +0000
Dear All,
let's meet on Friday September 22nd @ 10:30am EDT:
I populated a tentative agenda. Please prepare slides to remind us where we are, before we enter the discussion about a future planning for the coming half a year or so.
Regards,
Alexander.
-
[Eic-projdet-pfrich-electronics-l] pfRICH HRPPD ASIC / FPGA backplane design meeting on Friday Sep 22nd @ 10:30am EDT,
Kiselev, Alexander, 09/18/2023
- Re: [Eic-projdet-pfrich-electronics-l] pfRICH HRPPD ASIC / FPGA backplane design meeting on Friday Sep 22nd @ 10:30am EDT, Kiselev, Alexander, 09/22/2023
Archive powered by MHonArc 2.6.24.