Hi,
I sent our emails to Pasquale and he responded with answers (below and in the attached Word document).
Also, the SLAC library has finally scanned a copy of the BaBar Note 233 for me which has figures. I’m not sure how useful this is but it’s here
in our website:
https://collab.external.bnl.gov/sites/sPHENIX-Magnet/Shared%20Documents/BaBar%20Documents/BaBar%20Note%20233%20(scanned).pdf
Kin
From:
fabbric [mailto:pasquale.fabbricatore AT ge.infn.it]
Sent: Tuesday, April 14, 2015 3:46 PM
To: Yip, Kin
Subject: Re: Any comment on our colleagues doubt ?
Dear Kin,
I try to answer the questions posed by Mike Anerella. I cannot check precisely all because I am not in my office. I will be back on Thursday and can confirm what I am writing right
now at home.
Look a the attached file.
Best regards
Pasquale
Il 14/04/2015 17:21, Kin Yip ha scritto:
Dear Pasquale,
Mike Anerella (a mechanical engineer in BNL Magnet Division) wrote the following. While we're not sure how many turns there are
in the BaBar solenoid, he's also got a couple doubts for a couple details ?
Do you happen to have answers for any of his doubts ?
Kin Yip @ BNL
=====================
Joe, Bob,
Probably Bob’s source of information is construction data and therefore more accurate, but the coil drawing 620RM07142 shows the inner layer
with 545-548 turns and the outer layer with 540-543 turns (the uncertainty is from my interpretation of the Italian drawing). The larger number of turns as designed for the inner layer is due to the greater length/number of thin conductors in the ends of
the inner layer (to maintain field straightness in the ends).
The main reason I mention this is that the coil drawing shows that in addition to the inner to outer layer splice there are also splices in each
end of each layer where the conductor changes from thick to thin (five resistive splices total within the coil). I don’t see any mention of voltage taps at any of these splices but maybe they there are there. The splices may affect balancing if a warm-cold
correlation is assumed? Cause eddy current effects during ramping?
The splices are made by TIG welding the aluminum for a length of 1500 mm, and then after a gap of 200 mm, soldering with tin/lead solder for
300 mm on each side of the weld location. I do not find any mention of making direct contact between superconductors for the soldered connections but maybe this is the case. I also do not see mention of re-insulating the conductor after splicing but surely
at least this was done. Maybe Pasquale Fabricatorre can shed some light on this.
Mike
From: Muratore, Joseph
Sent: Monday, April 13, 2015 4:47 PM
To: Lambiase, Robert
Cc: Yip, Kin; Wanderer, Peter; Joshi, Piyush; Dimaiuta, Sebastian A; Anerella, Michael D
Subject: RE: [Sphenix-magnet-l] A draft plan for the sPHENIX Magnet Low Current Test in Bldg. 912
Hi Bob –
I was aware of the unequal inductances of the inner and outer layers. The electrical checkout at 4.5K includes ramp tests to determine the imbalance
and adjust the delta detector so that it will be balanced. This has had been done on a number of the magnets tested here at 902. Part B.7-8 if I remember correctly addresses this.
As far as using L(dI/dt) quench detection, we routinely make use of this scheme to make sure we cover the rare possibility of a simultaneous
quench in both halves.
I will look into the use of the integral as a threshold.
Thanks.
Joe
This is a very comprehensive test procedure. I’d like to add a few details for the quench detection based on a first pass look of the documentation
I saw this weekend.
-
Coil balance – The two halves are not equal. The inner coil has a smaller aperture and 531 turns, while the outer coil has a larger aperture and 536 turns. The scaling factor to equalize
the ramp voltage of the two halves should be determined. SLAC spent a bit of time doing this. We should determine this number.
-
Quench – The dump switch was triggered if there was an instantaneous exceeding delta V of IST (50mV) or an integral (I haven’t seen the time constant yet) of the delta V by INTEG (I
need to find out this number) exceeding 8V. The integrator was set to zero any time the delta V went below INTEG. Perhaps we should monitor this integral as well as the instantaneous trip vlaue. As far as I could tell, they didn’t use Ldi/dt in any calculations.
Hi,
Joe Muratore has just sent me a draft plan for the low current test. ( Thanks Joe !! )
For convenience, I've just put his plan (in Word document) to the agenda page :
https://indico.bnl.gov/conferenceDisplay.py?confId=1105
Please read and you may comment to the mailing list; or otherwise we'll discuss this on Apr. 22, 2015.
Kin
--
Dr. Pasquale Fabbricatore
INFN Sezione di Genova
via Dodecaneso 33, 16146 Genova Italy
Direct tel + 39 010 3536340
Laboratory + 39 010 3536437
Secret.fax + 39 010 313358
E-mail pasquale.fabbricatore AT ge.infn.it
WEB page http://www.ge.infn.it/~fabbric/
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