Sphenix-tpc-l mailing list

[Takao Sakaguchi <takao AT bnl.gov>]

Dear All,

 Following the advice from Eric after the last TPC electronics

meeting, I have been thinking over the possible geometry and

form factor for the FEE cards that ill be attached to the

pad planes of the detector.

 From the picture of a prototype SAMPA chip shown in the

STAR iTPC document, I assumed that it will be 208 pin

chips, whose typical geometry is ~32x32 mm2, including

the length of pins.

 With this taken into account, I made rough configuration of

FEE cards as attached.

 In order to fill the band width of the optical cable and to
reduce the number of fibers in the end, we should put as many
channels as possible on one card. On the other hand, if you
put too many channels, replacing a card costs a lot.

 This kind of exercise is important to determine the number of

optical signal receiver and data storage PCs, which would

amount to a sizable fraction of the total cost.

Takao
 

--

Takao Sakaguchi
Brookhaven National Laboratory
Physics Department, Bldg. 510C
takao AT bnl.gov
Office: 1-631-344-3345

Attachment: PadsAndFEEconfiguration.pdf
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