sPHENIX Event Plane Detector discussion

[Jamie Nagle <jamie.nagle AT colorado.edu>]

Hello  sEPDers,

Just following up on this thread.    Would you be able to give a detailed update on the handling of these ADC boards and known issues during a SCM update on Tuesday?

Sincerely,

Jamie

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|| James L. Nagle   
|| Professor of Physics, University of Colorado Boulder

|| EMAIL:   jamie.nagle AT colorado.edu
|| SKYPE:  jamie-nagle        
|| WEB:      http://spot.colorado.edu/~naglej 
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On Thu, Sep 12, 2024 at 5:14 PM Jamie Nagle <jamie.nagle AT colorado.edu> wrote:

Hello sEPDers,

The sEPD appears to be taking good data through the pp run.     At this point, it would be very helpful to have an evaluation of the data from a set of good runs, in particular to evaluate whether the ADC electronics is working including the work around offline (via the chi^2 to the waveform) for channels with the "stuck bit" problem.      I think we need an answer to this question  by October 1, 2024 in terms of planning and whether we will need to swap out ADC boards and do additional checks.

Glad to discuss the needs and timeline.

Sincerely,

Jamie

||------------------------------------------------------------------------------------------
|| James L. Nagle   
|| Professor of Physics, University of Colorado Boulder

|| EMAIL:   jamie.nagle AT colorado.edu
|| SKYPE:  jamie-nagle        
|| WEB:      http://spot.colorado.edu/~naglej 
||------------------------------------------------------------------------------------------