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  • From: "Kotov, Ivan" <kotov AT bnl.gov>
  • To: "Sakaguchi, Takao" <takao AT bnl.gov>, "sphenix-tpc-l AT lists.bnl.gov" <sphenix-tpc-l AT lists.bnl.gov>, Glenn Young <glennyoung82251 AT gmail.com>
  • Subject: Re: [Sphenix-tpc-l] Spark protection scheme for the next FEE board
  • Date: Tue, 17 Dec 2019 20:43:02 +0000

Hi Takao,

I would vote for modified ATLAS scheme, slide 5.
The protection is most effective when it is directly connected to the pad and
~ 1pF capacitance increase looks like a reasonable price to pay considering
12-33 pF pad cap (slide 3).

my 2 cents,
Ivan

On 12/17/19, 14:26, "Sphenix-tpc-l on behalf of Sakaguchi, Takao"
<sphenix-tpc-l-bounces AT lists.bnl.gov on behalf of takao AT bnl.gov> wrote:

Dear All,

I sat down with Vinnie from ATLAS, got some input from
several others, and came up with a set of input protection
schemes that we may want to implement in the next
version of the FEE board and test. See the slides attached.

Vinnie said that the most upstream (detector side)
resistors had more chance of being damaged compared
to the downstream, which is reasonable.

I would like to hear your input, hopefully by the end of
this week. If no input, I would like to go with the proposed
scheme shown on the slide 8, which has maximum degree
of freedom for testing as far as I can tell.

Takao







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