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  • From: 董家宁 <jndong AT sdu.edu.cn>
  • To: <star-fst-l AT lists.bnl.gov>
  • Subject: Re: [Star-fst-l] Weekly FST meeting - 10/24/2019
  • Date: Tue, 29 Oct 2019 14:24:10 +0800

Hi Gerard and Mike,
I have modified the address connection (from V+ to GND) for temperature
sensor chip on outer hybrid.
The latest schematic, layout, gerber and design files are upload to the
WIKI. (https://wiki.bnl.gov/star/index.php/Hybrid_and_T-board)
Please double check if there are any mistakes.
Please let me know if you need any other files or documents.
Thanks!

Hi Gerard,
The schematic for v3.0 T-board is also upload to the WIKI, on which one set
of temperature sensor chip and reset circuit is kept.
Please double check.
Thanks!

Best,
Jianing


> -----原始邮件-----
> 发件人: "Zhenyu Ye" <yezhenyu2003 AT gmail.com>
> 发送时间: 2019-10-25 02:02:06 (星期五)
> 收件人: star-fst-l AT lists.bnl.gov
> 抄送:
> 主题: Re: [Star-fst-l] Weekly FST meeting - 10/24/2019
>
> Minutes
>
> Attendees: Elke, Flemming, Gerard, Hu, Jianing, Krishan, Mike, Prithwish,
> Zhenyu
>
> Mechanical structure - Yi (by email)
> (1) We finished modifying the drawings of the mechanical structure (changed
> the locations of the chips and enlarge a bit the heat sinks) today, and I
> just sent it to the company (Easton) for verification. Hope to hear back
> from them tomorrow.
> (2) 8 good cooling tubes which passed the leak test are produced by AIDC
> and we will receive them tomorrow.
> (3) Promised documentation (1st draft) will be released by Monday. All the
> details like test procedures will be included.
>
>
> Hybrid/T-board - Jianing/Gerard
> Action items:
> (1) Jianing will change the temperature sensor address on the outer section
> Hybrid so that it is different than that on the inner section Hybrid
> (2) Gerard and Mike will check the latest hybrid layouts sent by Jianing by
> next Tuesday
> (3) Jianing and Gerard will start working on T-board 3.0 layout (only 1
> temperature sensor, 1 reset circuit, etc). The first will be the circuit
> schematics
>
> T-board/Inner Signal Cable - Mike/Gerard
> Decision: we will use the IST-type of cables since alternative options seem
> to be more expensive according to quotes collected by Mike
> Action items:
> (1) Gerard will check the T-board 2.1 to make sure it can work for
> prototype after some modifications
> (2) Gerard will check the latest cable/T-board 2.1 assembly documents sent
> by Mike
>
> Module Assembly at Fermilab - Zhenyu
> Status: discussion with Fermilab designer and UIC machine shop on going.
> Wire-bonding test on whether or not the (0.526,2.6mm) shift is an issue for
> wire-bonding will be done later this week/early next week
>
> Simulation
> Status: Te-Chuan is working on detailed modeling of FST sub-structures.
> Krishan is going to discuss with Daniel this weekend about the new tracking
> code
>
> Cooling system - Flemming/Rahul
> Gerrit talked to James Kelsey and Jason Bessuille from MIT. They are
> willing to service the IST cooling system to make it work again, but asked
> us to ship the cooling system to MIT. Because this would lead to additional
> shipping costs and make it harder for BNL STSG to take over, it is proposed
> to request the MIT engineers to come to BNL for the service work. Gerrit
> again expressed concerns with using soft tubes in the cooling system with
> Novec.
> Action item
> (1) Elke is going to get into contact with Richard Milner, Redwine
> (2) Yi reports the tests he is doing with the compatibility of the soft
> tubes with Novec.
> (3) BNL tests the compatibility of the soft tube with flowing Novec.
> (4) Zhenyu will follow up on the grounding of the cooling system if using
> soft (non-conductive) tubes
>
> > On Oct 22, 2019, at 7:56 AM, Zhenyu Ye <yezhenyu2003 AT gmail.com> wrote:
> >
> > Dear all,
> >
> > We will have a meeting starting at 9am BNL time this Thursday Oct 24. The
> > meeting agenda and bluejeans info can be found at
> > https://drupal.star.bnl.gov/STAR/blog/yezhenyu/forward-silicon-tracker-weekly-meeting
> >
> > 1 Mechanical Structure - Yi Yang, Han-sheng Li
> > 2 Hybrid - Jianing Dong
> > 3 T-board and Inner Signal Cable - Michael Capotosto
> > 4 Module Assembly at Fermilab - Zhenyu Ye
> > 5 Simulation - TBD
> >
> > Best,
> > Zhenyu
>
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