U.S. ATLAS HL-LHC Upgrade Level 2 and Deputies-NSF only Management Mailing List

[Michael Tuts <tuts AT pmtuts.net>]

FYI… so far this is all I have seen.

 

From: Giorgio Apollinari <apollina AT fnal.gov>
Sent: Tuesday, April 18, 2023 6:18 PM
To: Thomas Schwarz <schwarzt AT umich.edu>; anyes.taffard AT cern.ch
Cc: Giorgio Apollinari <apollina AT fnal.gov>; Mark Coles <mcoles AT nsf.gov>; Abolhassan Jawahery <jawahery AT umd.edu>; Jay Hauser <hauser310 AT gmail.com>; Gustaaf Brooijmans <gusbroo AT nevis.columbia.edu>; Michael Tuts <tuts AT pmtuts.net>
Subject: Additional elements of discussion for tomorrow

 

Hi Tom and Anyes

Good presentation today. Here are some points/questions prompted from what we heard so far. Maybe they are already part of you materials in tomorrow presentations but we are raising them just in case:

 

sMDT

 

1. What are the estimate and confidence in the estimate for remaining work, especially the work to be performed at CERN for acceptance under NSF scope ?

 

TDC

 

2. What are the plans about packaging excess numbers of TDC chips (~40%?). It seems spares and packaging yields are being mixed. Could there be a significant saving by packaging part of the TDC order and assessing yield before deciding how many to package?

 

L0MDT

 

1.       how did you underestimate the complexity of the L0MDT and what were the cost increases (larger FPGAs)

2.       As to the work sharing with MPI and the L0MDT risks - how is 75% responsibility for firmware allocated? By functional blocks? All the hardware is 50/50 with MPI, if the firmware runs behind should the split on firmware also be 50/50? 

3.       Technical question - are the hits to trigger efficiency that are mentioned in the risk contingency in the case that part or whole of the L0MDT is descoped realistic?