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[Eic-projdet-pfrich-l] A first draft of electronics configuration for pfRICH

From: "Kiselev, Alexander" <ayk AT bnl.gov>
To: "eic-projdet-pfrich-l AT lists.bnl.gov" <eic-projdet-pfrich-l AT lists.bnl.gov>
Subject: [Eic-projdet-pfrich-l] A first draft of electronics configuration for pfRICH
Date: Fri, 14 Oct 2022 14:52:17 +0000

Hello Colleagues,

for those who is in the Convener meeting now, we may actually be a better shape on the electronics configuration side, than it looks like. See the CAD model draft snapshots attached, assuming 24x24 HRPPD pixellation (~4.2mm pixel size), presently available Nalu UDC chips (for a total of 36 16-channel ASICs), for a total of ~2kW power dissipation or so for the whole subsystem. Gives us pretty much 37-40cm of the expansion volume. We should discuss this in our next meeting.

Cheers,

Alexander.

Attachment: pfrich.0.png
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Attachment: pfrich.1.png
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[Eic-projdet-pfrich-l] A first draft of electronics configuration for pfRICH, Kiselev, Alexander, 10/14/2022