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sphenix-maps-l - [Sphenix-maps-l] FW: sPHENIX GTM bit pattern

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Subject: sPHENIX MAPS tracker discussion

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Chronological Thread  
  • From: Ming Liu <ming AT bnl.gov>
  • To: sphenix-mvtx-l <sphenix-maps-l AT lists.bnl.gov>, "Mead, Joseph" <mead AT bnl.gov>, John Kuczewski <jkuczewski AT bnl.gov>
  • Subject: [Sphenix-maps-l] FW: sPHENIX GTM bit pattern
  • Date: Thu, 01 Oct 2020 14:09:46 -0600

FYI,

Resend bounced email from Cameron about MVTX/sPHENIX GTM bit pattern.

 

Cameron – I added your BNL email to the mvtx mailing list.

 

Ming  

 

-- 

Ming Xiong Liu

P-25, MS H846                     TEL: 505-667-7125 

Physics Division                            631-344-7821(BNL)

LANL                                               630-840-5708(FNAL)

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From: "Dean, Cameron" <cdean AT bnl.gov>
Date: Thursday, October 1, 2020 at 11:42 AM
To: "Mead, Joseph" <mead AT bnl.gov>
Cc: sPHENIX-MAPS-l <sphenix-maps-l-bounces AT lists.bnl.gov>
Subject: sPHENIX GTM bit pattern

 

Hi Joe,

The MVTX firmware team has been looking at the interface between the FELIX card and the GTM. We noticed that there is a mismatch between the bit pattern we found in the GTM documents and what is decoded in FELIX. Would it be possible to confirm what the 16-bit pattern sent for each GTM clock is?

I’ve attached some slides explaining this in a little more detail but, on our side, I see that the ‘End Data’ and ‘Mode Enable’ bits are in a different order.


Cheers,
Cameron

P.S.  The comparison of bits we see is:

Bits from GTM

Bits set in FELIX

Mode bits / BCO

0-7

0-7

Beam Clock

8

8

LVL1 Accept

9

9

End Data

10-11

11-12

Mode Bit Enable

12

10

User Bits

13-15

13-15

 

Attachment: felix_gtm.pdf
Description: Adobe PDF document




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