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[nie <nie AT rcf.rhic.bnl.gov>]

Hi Zhenyu,

I think we all agree to move the capacitor to the other side at current 
stage.
Can you provide more information about the conflict? Like top layer or 
bottom layer?
These information will be helpful for us.

Thanks,
Maowu


在 2020-08-04 23:55，Gerard Visser 写道：
> hi Zhenyu,
>         A few comments below. Thanks,
>
>                 Gerard
>
> On 8/4/2020 11:48 AM, Ye, Zhenyu wrote:
> > Dear all,
> >
> > I think the review went smoothly yesterday. Thanks for all the hard 
> > work. I think we were able to answer most of the questions from the 
> > committee and also received very helpful suggestions from them. The 
> > committee is now working on the report, which will be distributed 
> > later this week.
> >
> > Below are some notes I took from the review. Please feel free to 
> > comment or add.
> >
> > *************************************
> > Mechanical structure:
> > Use thermal camera with cooling applied to the other side of the 
> > mechanical structure to check if there is air trapped between hybrid 
> > and MS
>
> We may expect there will be air pockets. What is the action to take?
> Are we expecting to develop some criteria on where there must not be
> air pockets, or on size of air pockets?
>
> > Add an explicit step in the document/traveller to clean the flux after 
> > components mounting on the hybrid
> > Add details about criteria of acceptance/rejection into traveller
> > Send bare modules to US as soon as they are produced and certified
> >
> > T-board:
> > Check the updated T-board design as soon as new T-boards are produced
>
> Also, see below.
>
> > Module assembly/test at FNAL/UIC:
> > Find a better (clear) way to present the efficiency and clarify the 
> > KPP requirements
> > Optimize the production plan to create float: have two production 
> > lines, start module assembly with APV chips when the bare modules are 
> > available
> >
> > Mechanical integration:
> > Find out the flatness requirement for mounting modules onto the 
> > support structure?
> > Define the tolerance requirement for installation and survey
> > Ground the cooling tube and supporting structure
>
> We should probably do this by a local connection to the T-board. Let's
> identify a suitable way and add this possibility in T-board revision
> which is happening anyway now. It was done similarly on IST I believe
> (actually on hybrid there but T-board more appropriate here in FST I
> think, certainly because the hybrid designs should be considered
> frozen now.
>
> > Add handles and pieces to the installation tooling to make it easier 
> > to grab if needed during installation
> > *************************************
> >
> > Below I also list the action items from previous weeks, as well some 
> > new ones which appear from the discussions in the last few weeks
> >
> > *************************************
> > 1) Design and fabricate light-tight box for the DAQ integration test 
> > at BNL - Rahul/Flemming
> > 2) Design the cooling lines, and cable trays between disks and cooling 
> > manifold - Felix/Rahul
> > 3) Finalize how to mount modules onto the half-rings, and half-rings 
> > onto support structure, and document the proposed changes to the 
> > mechanical structure - Rahul/Yi/Zhenyu
> > 4) Design and fabricate module storage boxes for production at UIC - 
> > Xu/Andres
> > 5) Duplicate the module assembly tooling at UIC - Xu/Zhenyu
> >
> > 6) Update the T-board design to avoid the conflict with Mechanical 
> > structure - Jianing
> > 7) Look into the possibility to split the inner and outer sensor HV 
> > bias - Mike/Gerard/Jianing
> > 8) Send the problematic prototype cable-T-board assembly to Mike for 
> > investigation - Zhenyu/Mike
> > 9) Develop the QC procedure for Inner cable and T-board assembly - 
> > Mike/Maowu
> >
> > 10) Look into the overall large CMN noise, and the abnormal noise of 
> > few channels first appear in the readout - Gerard/Xu
> > 11) Check the FST noise performance at high readout rate - Xu/Zhenyu
> > 12) Sett up the laser test stand to characterize prototype module 
> > performance - Andres/Zhenyu
> > 13) FST slow simulator with efficiency/resolution measured with 
> > prototypes and study tracking performance - Gavin/Shenghui
> > *************************************
> >
> > Let’s discuss about all these at the FST meeting next Monday. 
> > Hopefully we will have the committee’s report by then.
> >
> > https://drupal.star.bnl.gov/STAR/event/2020/08/10/star-forward-silicon-tracker-meeting
> >
> > Best,
> > Zhenyu
> >
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