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["Kiselev, Alexander" <ayk AT bnl.gov>]

  Hello colleagues,

  attached is r15 of the V0 interface document, with the recent changes provided by Gabor and Pierrick included. The description of ASIC and FMC boards should now be complete and final for the V0 iteration, and all the links to CAD models and design drawings must be up to date.

  Section 5 (FPGA board) and 6 (Cooling setup) are still under construction. Please provide your feedback to the highlighted text.

  Daniel, once you have a cooling setup model, let's have a final discussion round, and fix the sink layout. At some point soon we need to ask Bill to start machining these sinks.

  Concerning the attached document, pay attention to the photo in Figure 1 (center) and the respected text in green: Incom received the first five anode base plates from Kyocera last week (and is sending one to BNL, at which point we know the trace resistivity and capcitance). Next week we are also expecting the compression interposers from Samtec.

  Regards,

    Alexander.

Attachment: HRPPD_HGCROC3_Readout_Interface_V0.r15.pdf
Description: HRPPD_HGCROC3_Readout_Interface_V0.r15.pdf