ePIC pfRICH electronics mailing list

["Kiselev, Alexander" <ayk AT bnl.gov>]

  Hi Gabor,

  There are few remaining questions related to the temperature monitoring in this V0 iteration:

  (1) can we add at least one permanently mounted temperature sensor (on the FPGA board), provisions to attach at least one remote sensor (placed next to one of the ASICs), and some minimal I2C circuitry to handle those by FPGA, in order to get a feeling of how this all will look in V1?

  (2) can you point Daniel to other expected hot spots on the FPGA board (say related to power convertors, ethernet-related circuitry, etc)?

  Also, Christophe, Pierrick: remind us please, what is the safe temperature range we are going to operate the ASICs?

  Cheers,

    Alexander.