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  • From: Tim Andeen <timothy.robert.andeen AT cern.ch>
  • To: Gustaaf Brooijmans <gustaaf.brooijmans AT cern.ch>
  • Cc: "Usatlas-hllhc-l2deputymgmt-nsf-l AT lists.bnl.gov" <Usatlas-hllhc-l2deputymgmt-nsf-l AT lists.bnl.gov>
  • Subject: Re: [Usatlas-hllhc-l2deputymgmt-nsf-l] Delay to get additional chips?
  • Date: Wed, 26 Oct 2022 15:44:05 +0000

Hi Gustaaf, 

I think the question is whether TSMC has the 4 wafers available or not.

Agreed, and I asked exactly this to Kostas but the answer has was still “3 months”. 

It is almost certainly untrue that packaging will be faster for the extra die than from engineering run wafers. 

Also agree, but at least on my side I know how to get the dice from CERN and send them to JCET. I don’t have experience sending wafers directly. I’m sure this isn’t a problem but I add some uncertainty on that step. 

save a couple of months seems worth it.

Thanks. I’ll get the new tasks to Penka and will present the diff report next week.


Best, Tim


__________________________________________________
Tim ANDEEN | Associate Professor | Department of Physics     
College of Natural Sciences | The University of Texas at Austin
tandeen AT utexas.edu | tandeen.web.cern.ch
office (TX) PMA 10.208 | (CERN)  304/1-024
ph (TX):  +1 512 475-9575 | (CERN): +41 (0)22 76 758 14
__________________________________________________


On Oct 26, 2022 at 2:21:22 AM, Gustaaf Brooijmans <gustaaf.brooijmans AT cern.ch> wrote:

Hi Tim,

I think the question is whether TSMC has the 4 wafers available or not.  The likely answer is yes; they always make more during MPW runs.  If they have to produce them it will not be faster than the preproduction run.

It is almost certainly untrue that packaging will be faster for the extra die than from engineering run wafers.  JCET certainly prefers to work directly from wafers because that’s their production setup.  Removing die from gel packs is manual work.  That said, I’m not opposed to this BCP.  $60k to potentially save a couple of months seems worth it.

Best,

Gustaaf

On Oct 25, 2022, at 11:43 PM, Tim Andeen <timothy.robert.andeen AT cern.ch> wrote:

Hi Gustaaf, 

Mike also asked a related question in the meeting. Kostas says 3 mo. lead time in an email, but I don’t have a firm date. I’m checking with Kostas+Cinzia now as we’re trying to start the purchase order. 

The other piece of this is the pre-production run. Kostas has said that we should plan at least 4 mo. to get wafers, but also no guarantees. There we are in touch with imec now and aiming for Nov 15. I think there is a good chance that, if we work quickly, we get the CV4 chips 1-2 months ahead of the preproduction wafers. I also expect that since JCET recently did this for the ALFE we could go from CV4 dice -> prototype BGA packages faster than the pre-production wafers -> prototype BGA packages.  

Best, Tim


__________________________________________________
Tim ANDEEN | Associate Professor | Department of Physics     
College of Natural Sciences | The University of Texas at Austin
tandeen AT utexas.edu | tandeen.web.cern.ch
office (TX) PMA 10.208 | (CERN)  304/1-024
ph (TX):  +1 512 475-9575 | (CERN): +41 (0)22 76 758 14
__________________________________________________


On Oct 25, 2022 at 1:24:02 PM, Gustaaf Brooijmans <gustaaf.brooijmans AT cern.ch> wrote:

Hi Tim,

Neither your slides nor the quote give a timeline to get the additional 400 chips.  Do you have a firm date if you put in the order soon?

Thx

Gustaaf
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