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[Zhenyu Ye <yezhenyu2003 AT gmail.com>]

Gerard, thanks for looking into the hybrid layouts. Regarding the clearance 
of the APV die pad, I spoke with the Fermilab technician and was told that it 
is doable with some caution.

Zhenyu

Sent from my iPhone

> On Nov 14, 2019, at 10:43 AM, Gerard Visser <gvisser AT indiana.edu> wrote:
> 
> hi Jianing, Zhenyu,
>    Zhenyu had asked if the inner hybrid (2.1) looked similarly in my 
> opinion. I had a look at that again just now. Of course the 4th point below 
> is not applicable. As to APV die attach pad clearance, it is different on 
> the inner hybrid and looks like on average anyway more clearance. I think 
> it could still have had a bit more clearance though. (But, doing an angled 
> layout can be difficult, increasing clearance may be difficult. And anyway 
> the real question is what do the bonding experts who will be assembling 
> this think? If they say it is fine to assemble without risk of shorts then 
> that is completely fine, no more clearance is needed than that.) The 
> temperature sensor is closer to APV by default since everything is closer 
> together. The skinny power layout issues are there but not as severely; I 
> see again one via carrying power where I'd prefer to have seen a couple of 
> vias in parallel.
>    In summary I don't see any catastrophic issues there. It makes sense to 
> improve the new outer hybrid, assemble a full module and read it out and 
> see good pedestals and cosmics and then declare victory and move on to 
> production. But if for any reason the inner is revised these points should 
> be addressed then.
>    Sincerely,
> 
>        Gerard
> 
> 
>> On 11/14/2019 9:53 AM, Gerard Visser wrote:
>> hi Jianing,
>>     The outer hybrid layout looks pretty good, but I have a few comments 
>> for your consideration:
>> - I have some concerns about impedance of power routing on the hybrid, 
>> please see attached picture. Unless I am misunderstanding something, it is 
>> not too good and it could I think be very much improved with small changes 
>> in your layout. It is very hard to say how important this is. However I 
>> think the APV chip is not the best in the world for insensitivity to power 
>> supply voltage and noise; statement based on my recollections of 
>> prototyping for the STAR FGT. I think we should take care to make it as 
>> good as we reasonably can.
>> - It would be better if the temperature sensor was closer to one of the 
>> middle APV chips. Those will of course be the hot spots. But this is not 
>> critical, we don't really need an absolute temperature measurement from 
>> these, really we just need to monitor if temperatures are changing from 
>> whatever the normal reading turns out to be.
>> - I think it would be better if there was a lot more clearance around the 
>> APV die attach pad to other nets. You have 0.212 mm. This is surely plenty 
>> for building the hybrid, but I am worried about the die attach epoxy 
>> spilling out and risking a short. Have the Fermilab people reviewed the 
>> hybrid gerbers, any comment from them about it? I guess if they are not 
>> worried, I am not worried about it then either, as long as they saw this 
>> detail.
>> - Do we really want that long skinny bit of top coverlayer between the two 
>> sensors? (I am assuming the .GTS gerber is negative of the coverlayer.) 
>> Note I do not see this in the old (7/12/2019) hybrid in the picture that 
>> Yi recently sent. Maybe it was there in design and your vendor deleted it 
>> for you?
>>     Sincerely,
>>         Gerard
>>> On 11/7/2019 9:48 AM, Gerard Visser wrote:
>>> hi Jianing,
>>>      I checked the schematics
>>> 
>>> outer hybrid
>>> https://drupal.star.bnl.gov/STAR/system/files/hybrid_outer_v2_3-schematic_0.pdf
>>> 
>>> inner hybrid
>>> https://drupal.star.bnl.gov/STAR/system/files/hybrid_inner_v2_1-schematic.pdf
>>> 
>>> T-board
>>> https://drupal.star.bnl.gov/STAR/system/files/T-Board_v3-schematic.pdf
>>> 
>>>      I think everything looks correct in these. One minor point is that 
>>> we probably have to change the resistor values (on T-board and on 
>>> hybrids) to have less reflection on the CLK and TRG lines. The cable has 
>>> a characteristic impedance (differential) of around 100 to 110 Ohms. (It 
>>> isn't very precisely controlled, we should measure it when we have the 
>>> cable, but it will be around that value. So we should make the input 
>>> impedance of T-board and hybrids assembly around 100-110 Ohms. I suggest 
>>> changing the resistors R1, R2 on outer hybrid and on inner hybrid from 
>>> 49.9 to 78.7 Ohm, and the leaving the resistors R9, R10, R11, R12 on the 
>>> T-board at 33.2 Ohm. Final values have to be confirmed after all the 
>>> boards and cable are available for a scope measurement. At that time we 
>>> _might_ decide to change the value on T-board; the 78.7 Ohm on hybrids is 
>>> very likely to be fine (and is of course a lot more trouble to modify on 
>>> existing boards, so we won't want to do that).
>>>      [FYI in IST from the documents at 
>>> https://drupal.star.bnl.gov/STAR/blog/yezhenyu/forward-silicon-tracker-ist
>>>  the naively calculated input impedance 166 Ohms which is not right. I am 
>>> not sure why, perhaps the documents are not really all correct. I think 
>>> Ben did look at CLK & TRG waveforms with a scope and optimize these, 
>>> although I don't have any record of it.]
>>>      I will have a look at new outer hybrid layout for electrical / 
>>> layout issues only -- not for mechanical interface issues -- but I expect 
>>> no problems, it will look nice as the prior version did.
>>>      Thanks,
>>> 
>>>          Gerard
>>> 
>>> 
>>>> On 10/31/2019 10:22 PM, 董家宁 wrote:
>>>> Hi Gerard,
>>>>    Thanks for your help.
>>>>    There are no changes on the connector part.
>>>>    Please let me know if you need any other files.
>>>>    Thanks!
>>>> 
>>>> Best,
>>>> Jianing
>>>> 
>>>> 
>>>>> -----原始邮件-----
>>>>> 发件人: "Gerard Visser" <gvisser AT indiana.edu>
>>>>> 发送时间: 2019-11-01 10:14:39 (星期五)
>>>>> 收件人: star-fst-l AT lists.bnl.gov
>>>>> 抄送:
>>>>> 主题: Re: [Star-fst-l] Weekly FST meeting - 10/31/2019
>>>>> 
>>>>> hi Jianing, Zhenyu,
>>>>>     Somebody was going to document (simply with a picture or two) how 
>>>>> that the
>>>>> connector tab of outer (particularly) hybrid fits well to the T-board on
>>>>> mechanical structure. I think we should see this before the new outer 
>>>>> hybrid is
>>>>> ordered. (Is there any change in this aspect of the new outer hybrid? I
>>>>> understood no change.)
>>>>>     Meanwhile, yes it is in my inbox to check the electrical aspects, I 
>>>>> will try to
>>>>> have that done by early next week.
>>>>>     Thanks,
>>>>> 
>>>>>         Gerard
>>>>> 
>>>>> 
>>>>>> On 10/31/2019 10:04 PM, 董家宁 wrote:
>>>>>> Dear All,
>>>>>> 
>>>>>>     2.Hybrid, T-board:
>>>>>> 
>>>>>>     With the help of Mike and Gerard,  the address connection for the 
>>>>>> temperature
>>>>>> sensor chip on outer hybrid is modified and updated.
>>>>>> 
>>>>>>     And the schematic for T-board v3.0 is also updated (keep one set of
>>>>>> temperature sensor and reset circuit).
>>>>>> 
>>>>>>     I think they are all waiting for the double check.
>>>>>> 
>>>>>>     If there are no other mistakes for outer hybrid layout, it will 
>>>>>> take about 3
>>>>>> weeks for the production.
>>>>>> 
>>>>>>     All the detailed status are listed on the WIKI
>>>>>> (https://wiki.bnl.gov/star/index.php/Hybrid_and_T-board).
>>>>>> 
>>>>>> 
>>>>>> Best,
>>>>>> 
>>>>>> Jianing
>>>>>> 
>>>>>> 
>>>>>>      -----原始邮件-----
>>>>>>      *发件人:*"Capotosto, Michael" <capotosto AT bnl.gov>
>>>>>>      *发送时间:*2019-11-01 05:43:15 (星期五)
>>>>>>      *收件人:* "Ye, Zhenyu" <yezhenyu AT uic.edu>, "star-fst-l AT lists.bnl.gov"
>>>>>>      <star-fst-l AT lists.bnl.gov>
>>>>>>      *抄送:*
>>>>>>      *主题:* Re: [Star-fst-l] Weekly FST meeting - 10/31/2019
>>>>>> 
>>>>>>      All,
>>>>>> 
>>>>>>      As discussed last meeting, I’ve compiled the documentation and 
>>>>>> posted it to
>>>>>>      the wiki: https://wiki.bnl.gov/star/index.php/Cables
>>>>>> 
>>>>>>      T-Board/Inner Signal Cable:
>>>>>> 
>>>>>>      Last meeting we agreed we would use the IST-type of cables, due 
>>>>>> to cost. It
>>>>>>      turns out I misinterpreted the quote – we were quoted for 400ft 
>>>>>> of cable but
>>>>>>      they had a minimum 1,000ft order. It is cheaper as Gerard 
>>>>>> expected to use
>>>>>>      the Polypropylene/PVC/PVC cable. I’m waiting to hear back from 
>>>>>> Gerard on how
>>>>>>      he’d like to proceed. The updated quotes binder mentioned can be 
>>>>>> found here:
>>>>>> https://drupal.star.bnl.gov/STAR/system/files/Cable%20Quotes%20Binder%2010-28-2019.pdf
>>>>>>  
>>>>>> <https://drupal.star.bnl.gov/STAR/system/files/Cable%20Quotes%20Binder%2010-28-2019.pdf>
>>>>>>  
>>>>>>      The quotes binder also includes new updated (non-expired) quotes, 
>>>>>> so once we
>>>>>>      have a decision we can order the cables. (Elke/Gerard/Zhenyu, 
>>>>>> will this be
>>>>>>      on one of the BNL accounts, or will I be sending this to someone 
>>>>>> else? If it
>>>>>>      will be on a BNL account I can start drafting the PO so it will 
>>>>>> be ready to
>>>>>>      send when we make a final decision).
>>>>>> 
>>>>>>      Regarding the V2.1 T-Board modifications, I believe we just need 
>>>>>> to remove a
>>>>>>      handful of parts to in order to make it work, I’ve discussed this 
>>>>>> in an
>>>>>>      email with Jianing and Gerard, and am waiting to hear back from 
>>>>>> Gerard. I
>>>>>>      will have the cables re-labeled tonight before I leave (to match 
>>>>>> the VIA REF
>>>>>>      DES used in V2.1 T-Boards we are assembling). Once Gerard gives 
>>>>>> me the O.K.
>>>>>>      I’ll pull the parts off the boards, and we should be able to give 
>>>>>> them to
>>>>>>      the assembler within a working day or two. If there are no 
>>>>>> objections, I
>>>>>>      will extend the due date for the vendor to November 29.
>>>>>> 
>>>>>>      If I’ve missed any points please let me know.
>>>>>> 
>>>>>>      Best,
>>>>>> 
>>>>>>            Mike Capotosto
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