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["Capotosto, Michael" <capotosto AT bnl.gov>]

Gerard,

Just an FYI - I struggled interpreting the gerbers previously, I believe 
Jianing is using Altium, and I've found this PDF helpful for gerber output 
extensions. 
http://valhalla.altium.com/Learning-Guides/OG0101%20Gerber%20Output%20Options.pdf

For example, it lists GPT as "Pad Master Top", and GTP as "Top Paste Mask".

Jianing, can you confirm that your smallest drill is a 0.3mm? The smallest 
trace width/trace space I saw were 0.18mm (Greater than the standard minimum 
of 6 mil/6 mil), were there any smaller? If I did miss any smaller this may 
affect the quote price. 

Thank you

--Mike

-----Original Message-----
From: Star-fst-l <star-fst-l-bounces AT lists.bnl.gov> On Behalf Of Gerard Visser
Sent: Monday, December 9, 2019 5:01 PM
To: 董家宁 <jndong AT sdu.edu.cn>
Cc: star-fst-l AT lists.bnl.gov
Subject: Re: [Star-fst-l] Weekly FST meeting - 12/5/2019 9:30am BNL time

hi Jianing,
        All looks reasonable I think. We should build it.
        One small point, it seems the wire solder holes have solder paste in 
the paste gerber data. This is probably not what we want. Perhaps the 
assembly vendor knows to delete it, or can be asked to delete it. It's 
probably better if you delete it though.
        [Woops. Now I see there are two sets of paste files??? E.g. ".GPT" 
vs. ".GTP". 
And one of these has paste on the wire holes, one does not. My suggestion is 
get rid of the files the fab and assembly vendors don't need or want. 
(Some/all of the "mechanical" gerbers are also irrelevant to the fabrication, 
maybe. You have a lot of files here, for a four-layer board.]
        Anyway, I suggest proceed to build this but I think it would well for 
Jianing (and Mike) to first make sure about the fab files details.
        Thanks, sincerely,

                Gerard


On 12/4/2019 4:52 AM, 董家宁 wrote:
> Hi Gerard,
>    I just finished the layout for v3.0 T-board, please find the gerber 
> files in the attachment or the following link. 
> (https://drupal.star.bnl.gov/STAR/blog/jndong/191204-gerber-files-t-board-v30)
>    Since the new year is approaching, I think it will take at least 4~5 
> weeks for production in China after your final approval.
> 
> Best,
> Jianing
> 
>> -----原始邮件-----
>> 发件人: "Gerard Visser" <gvisser AT indiana.edu>
>> 发送时间: 2019-12-04 05:32:29 (星期三)
>> 收件人: star-fst-l AT lists.bnl.gov
>> 抄送:
>> 主题: Re: [Star-fst-l] Weekly FST meeting - 12/5/2019 9:30am BNL time
>>
>> hi Mike,
>>      I think if we truly need more than two or so T-boards for first 
>> tests, then this is indeed a sensible approach. Modifying two or 
>> three or so, testing everything, making any further changes anywhere 
>> (T boards and hybrids) if needed
>> -- hopefully not -- infomed by _complete_ results (pedestals/noise 
>> and cosmics) from that testing, and then going for production would 
>> maybe be better. But I agree modifying many of the old design doesn't make 
>> much sense.
>>      Jianing, would the v3.0 layout be ready to fab, or more work needed 
>> in your opinion?
>>
>>      Gerard
>>
>> On 12/3/2019 3:04 PM, Capotosto, Michael wrote:
>>> Zhenyu/Gerard and all,
>>>
>>> I just wanted to get a jump and get this suggestion out before the 
>>> meeting. I've spoken with John Hammond regarding the modifications 
>>> required to the current V2.1 T-Boards, and we agreed it will probably be 
>>> a few hours of work per board - removing the duplicate components, and 
>>> adding worst case ~8 jumper wires, some of which need to cross to both 
>>> sides of the board.
>>>
>>> If we create new gerbers to match the V3.0  T-Board schematic, we may be 
>>> able to do a fast turn turnkey run. Getting approximate quotes from 
>>> Sierra Circuits, who we've used for turnkeys before, it would be ~$2,600 
>>> to have 10 PCBs fabbed, and stuffed for an 8-day turn. If this is 
>>> something that Jianing and Gerard wouldn't have time to work on, John 
>>> believes he can make the changes to the gerbers directly, and send the 
>>> files out, if Gerard approves the changes listed.
>>>
>>> If we were to also make 10 "test stand cables" using the new "purple" 
>>> cable, we would be looking at ~$2,400.
>>>
>>> It would cost another ~$1,350 to attach these cables to the t-board.
>>>
>>>
>>>
>>> This would all come to a total of $6,350. We may be able to get this 
>>> price down a little bit if we got quotes from local fab houses as well, 
>>> and by combining the job of making 10 "purple cable" assemblies and 
>>> assembling them to the pcb - this is a rough number.
>>>
>>> I believe this may be a good option - we would have the new revision of 
>>> the board with no bodge wires, we'd be using the production cable and 
>>> testing with its dielectric properties, etc., a better representation of 
>>> the final product; but it may be a tight deadline if we need it by 
>>> mid-January. If you think this is something we'd be interested in 
>>> pursuing I can start requesting quotes and see if we'd be able to have 
>>> more definite numbers by the meeting on Thursday.
>>>
>>> Best,
>>>
>>> Mike Capotosto
>>>
>>> -----Original Message-----
>>> From: Star-fst-l <star-fst-l-bounces AT lists.bnl.gov> On Behalf Of Ye, 
>>> Zhenyu
>>> Sent: Tuesday, December 3, 2019 1:00 PM
>>> To: star-fst-l AT lists.bnl.gov
>>> Subject: [Star-fst-l] Weekly FST meeting - 12/5/2019 9:30am BNL time
>>>
>>> Dear all,
>>>
>>> We will have a weekly FST meeting this Thursday 9:30am BNL time. The 
>>> meeting agenda and bluejeans info can be found at 
>>> https://drupal.star.bnl.gov/STAR/blog/yezhenyu/forward-silicon-track
>>> er-weekly-meeting
>>>
>>> 1. T-board and inner signal cable - Jianing Dong, Mike Capotosto, 
>>> Gerard Visser Gerard is reviewing the changes to v2.1 T-board suggested 
>>> by Mike.
>>>
>>> 2. Mechanical Structure - Yi Yang, Han-sheng Li Updates on the 
>>> status of mechanical structure fabrication and assembly, cooling 
>>> soft tube compatibility test, and transportation box design
>>>
>>> 3. Module Assembly at Fermilab - Zhenyu Ye Updates on module 
>>> assembly fixture/tooling design/fabrication
>>>
>>> 4. Simulation: Te-Chuan Huang, Krishan Gopal Updates from Te-Chuan 
>>> on FST geometry modeling
>>>
>>> If there is anything else to report/discuss, please let me know.
>>>
>>> Best
>>> Zhenyu
>>> _______________________________________________
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