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[Gerard Visser <gvisser AT indiana.edu>]

hi Zhenyu & all,
	I looked at all out schematics concerning the bias voltage connections and 
things should work out very well. We have to un-do the changes that we 
unfortunately made to all the PPB, which was not wise to have done before we had 
a final plan. But it should be feasible. And then we have to modify the ABC 
boards (18 of them) to cut two of the signal pairs from the ARM connector and 
instead wire to two new BNC conenctors (or to two cable pigtails to BNC 
connectors, would be OK). It would be possible to build 18 new ABC boards 
instead, but the D connectors if we use same high quality ones are rather 
expensive. Mike should please consider the pro/con for modification vs. new ABC 
boards.
	Attached slides summarize the detector bias connections from the detectors to 
the BNC connectors. Mike please check that I didn't get something wrong, of course.
	Let's call this decided, and get the PPB's back to their original state, and 
modify one or a few of the ABC boards for the test setup(s).
        Sincerely,

                Gerard

p.s. We should hi-pot the bias connections (up to T-board, unplugged from the 
hybrids) to some test voltage that makes sense (TBD) based on maximum operating 
voltage you expect. What is that max operating voltage?


On 8/10/2020 1:25 PM, Ye, Zhenyu wrote:
> Minutes:
>
> 1. Flemming showed a draft of committee recommendations. He will have a 
> meeting with the committee this afternoon. Expect to have a final version 
> soon.
>
> 2. Silicon sensors
> -> Zhenyu: requested for a new quote from Hamamatsu. Partial delivery of 
> Silicon sensors is not possible.
>
> 3. Use thermal camera with cooling applied to the other side of the 
> mechanical structure to check if there is air trapped between hybrid and MS
> -> Yi: trying it this week. Consider doing this in production
>
> 4. Update the T-board design
> -> Jianing will update the design this week
> 1) Move the capacitor to the other side
> 2) Add two ground holes
> 3) Tolerance for mounting T-board on the MS, taking into account the 
> constraint from connecting the outer hybrid
> 4) Check mounting T-board on the MS -> Yi will do it at NCKU
>
> 5. Split HV for inner and outer
> -> Decided to split HV. Mike/Gerard will look into the changes to PPB and 
> back-of-crate boards
>
> 6. Integration
> -> Rahul: will do a tolerance analysis, taking into account the 
> clearance/project requirements but also what can be achieved by the machine 
> shop. Need to have a plan for survey and discuss with Survey group
>
> 7. Simulation
> -> Gavin/Shenghui: slow simulator based on cosmic data is ready. Trying to 
> run the tracking code on RCF.
>
> 8. Mechanical structure
> ->  Yi: Han-Sheng leaving the project next week for PhD in US. Test the new 
> procedure with old hybrids. Will verify with the vendor about changes to the 
> precision pin: lead and pin lengths
>
> ***** Action items *****
> 1) Design and fabricate light-tight box for the DAQ integration test at BNL - 
> Rahul/Flemming
> 2) Design the cooling lines, and cable trays between disks and cooling 
> manifold - Felix/Rahul
> 3) Finalize how to mount modules onto the half-rings, and half-rings onto 
> support structure, and document the proposed changes to the mechanical 
> structure - Rahul/Yi/Zhenyu
> 4) Survey procedure/requirements - Rahul
>
> 5) Prepare documents for prelim Safety review with C-AD - all
> 6) Get updated quote from Hamamatsu - Zhenyu
> 7) Design and fabricate module storage boxes for production at UIC - Xu/Andres
> 8) Duplicate the module assembly tooling at UIC - Xu/Zhenyu
> 9) Discuss with Fermilab about module assembly schedule - Zhenyu
>
> 10) Update the T-board design to avoid the conflict with Mechanical structure 
> - Jianing/Maowu
> 11) Check how T-board mount onto MS - Yi
>
> 12) Look into splitting the inner and outer sensor HV bias - Mike/Gerard
> 13) Send the problematic prototype cable-T-board assembly to Mike for 
> investigation - Zhenyu/Mike
> 14) Develop the QC procedure for Inner cable and T-board assembly - Mike/Maowu
>
> 15) Look into the overall large CMN noise, and the abnormal noise of few 
> channels first appear in the readout - Gerard/Xu
> 16) Check the FST noise performance at high readout rate - Xu/Zhenyu
> 17) Sett up the laser test stand to characterize prototype module performance 
> - Andres/Zhenyu
> 18) FST slow simulator with efficiency/resolution measured with prototypes 
> and study tracking performance - Gavin/Shenghui
>
> > On Aug 8, 2020, at 10:48 AM, Ye, Zhenyu <yezhenyu AT uic.edu> wrote:
> >
> > Dear all,
> >
> > We will have the Weekly FST meeting on Monday starting at 9am EST (BNL local 
> > time).
> >
> > Bluejeans Meeting URL https://bluejeans.com/101020434
> > Meeting ID: 101 020 434
> >
> > https://drupal.star.bnl.gov/STAR/event/2020/08/10/star-forward-silicon-tracker-meeting
> >
> > 0. follow-ups on review and action items
> > 1. Integration                                                                
> > by Rahul Sharma, Felix Archampong
> > 2. Hybrid and T-board                                                 by 
> > Maowu Nie, Jianing Dong
> > 3. Simulation Studies                                                    by 
> > Gavin Wilks, Shenghui Zhang, Daniel Brandenburg
> > 4. Prototype Module Assembly and Test                       by Zhenyu Ye
> > 5. Mechanical structure                                                 by Yi 
> > Yang
> > _______________________________________________
> > Star-fst-l mailing list
> > Star-fst-l AT lists.bnl.gov
> > https://lists.bnl.gov/mailman/listinfo/star-fst-l
>
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